Author Archives: physnoct

Assembler trick: inline strings

Quite often, we need to send strings to a computer. Usually, there is a section in your code where you define the message with a label: ;string is terminated with null MsgHelloWorld: .asciz “Hello World!\r\n” ;subroutine to print strings putstr: … Continue reading

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Can a rock reflect light?

Many flat earth advocates mention that the moon emits its own light because rocks “don’t reflect light”.  I’ve done an experiment. Here’s a decent rock. Not black, not white, just a reasonable gray. The experiment setup: a white melamin board … Continue reading

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AVR Man and Wasteman

For those reading my previous post, I’m still alive! (And human!) While I’m tinkering with various processors, one of my favorites is the Atmel microcontrollers. A while ago, they had some comicbook style hero called AVR Man and his nemesis … Continue reading

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Nobody saw this coming

Nobody saw this coming. I don’t know how all of this began and when. Trump was reelected with a surprising majority. Or maybe before, when flat earthers reemerged on the web, proclaiming the earth is flat, based on old unscientific … Continue reading

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Spinning ball model

If we were to reproduce a spinning ball holding water, we should have gravitation exceeding the centrifugal acceleration (300 times stronger normally). The gravity (acceleration) holding the water should be: g = Gm1/R². Since we will scale down the model, … Continue reading

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Problem with assembler files when compiling a C project with SDCC and Codeblocks

I was trying to compile a simple C project (SDCC for Z80) with codeblocks. As usual, I stumble easily on minor problems, taking much time to look up for a solution. This time, it’s a small project that doesn’t want … Continue reading

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Altera Quartus, combining Verilog and VHDL

In my previous post, I ported the Multicomp from Grant Searle to an Altera Cyclone II FPGA platform. The Multicomp peripheral are quite minimal, and I wished to use the on board facilities. Code for these were supplied in Verilog. … Continue reading

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